Ni 6562 PFI clock

[timkoo]

Hello all,

 

     I am using a 6562 board. It will be used for generation purpose only. I am trying to generate 4 things. A pixel clock, a line clock a frame clock and a 16-bit data.

The pixel clock is a free-running clock whose frequency can be set to between 10MHz and 40 MHz.

The line clock should be a 1 clock wide pulse that occur every 400 pixel clocks.

The frame clock should be a 1 clock wide pulse that occur every 10 line clocks. (4000 pixel clocks)

The 16-bit data should change on each pixel clock with some data.

 

I have to be able to set the bit in PFI 1, PFI 2 and DCC clk-out LVDS. I looked at the examples given under the niHSDIO directory and didn?t find much information on that.

 

Under the Dynamic Generation and Generation-Source Synchronous Example, which export its data active event to PFI 1 (from generation) and the acqusisition will receive the start trigger from PFI 2. But I don?t really understand it.

 

Basically, I would like to know how can I generate the above patterns to the PFI 1, PFI 2 and DDC clk-out LVDS.

I have been stuck for a while and really would like some help.

 

Thank you very much.

[timkoo]

Hello Ryan,
 
     Thank you for the fast responding. Your information helped a lot. I think I understand the big picture now. I agree with you it's the best to use the data channel to create the toggle pattern. But since I am using all 16 channel on my 6562 for data, I cannot use that approach. When you said ?For example, if your waveform is 400 samples long and you generate a marker event on the 0th sample then you have created a "clock" that is 400 samples in duration." I see your logic behind it. I am trying to code it up now and I will let you know if I got anywhere ( I am getting very close now because of you, really thank you very much).
 
Tim
 

[timkoo]

Thank you for the reply. For the problem I posted, I believe the solution is using marker event like Ryan said. I looked at the example Dynamic Generation with Script>>DynamicGenerationWithMarker>>DynamicGenerationWithMarker.c. Basically, the main flow goes like
 
ViConstString script =       "script myScript "      "  repeat forever "      "     generate myWfm marker0(0, 128) "      "  end repeat "      "end script";
 
niHSDIO_ExportSignal(vi, NIHSDIO_VAL_MARKER_EVENT, "Marker0", NIHSDIO_VAL_PFI0_STR);
niHSDIO_WriteScript(vi, script);
niHSDIO_Initiate(vi);
 
I would do the same if I am sending a signal to PFI1 for every 400 clock (or waveform data in myWfm above)
 
Question 1: How does the program knows which marker is which in the niHSDIO_ExportSignal function? Because in the script, the marker name is marker0 while in the niHSDIO_ExportSignal function, the name is Marker0, which start with a Capital M.
 
 
Question 2:
I would like to know if I want to have 2 markers, 1 send a signal to PFI1 for every 400 clocks and 1 send a signal to PFI2 for every 4000 clocks, would the code look like the following if the myWfmhas a size of 4000?
 

ViConstString script =       "script myScript "      "  repeat forever "      "     generate myWfm marker0(0, 400, 800, 1200, 1600, 2000, 2400, 2800, 3200, 3600)  marker1 (0)"        "  end repeat "      "end script";
 
niHSDIO_ExportSignal(vi, NIHSDIO_VAL_MARKER_EVENT, "Marker0", NIHSDIO_VAL_PFI1_STR);
niHSDIO_ExportSignal(vi, NIHSDIO_VAL_MARKER_EVENT, "Marker1", NIHSDIO_VAL_PFI2_STR);
niHSDIO_WriteScript(vi, script);
niHSDIO_Initiate(vi);
 
Question 3:
Is this the correct way for making 2 marker
"generate myWfm marker0(0, 400, 800, 1200, 1600, 2000, 2400, 2800, 3200, 3600)  marker1 (0)"
 
Thank you.

[timkoo]

I C. so for "generate myWfm marker0(0, 400, 800, 1200, 1600, 2000, 2400, 2800, 3200, 3600)  marker1(0)" and
" niHSDIO_ExportSignal(vi, NIHSDIO_VAL_MARKER_EVENT, "Marker0", NIHSDIO_VAL_PFI1_STR);"

"niHSDIO_ExportSignal(vi, NIHSDIO_VAL_MARKER_EVENT, "Marker1", NIHSDIO_VAL_PFI2_STR);"

 

If they are correct. I guess it is not case sensitive then, correct? (you can have marker0 up there and when call the exportSignal function, you can use Marker0)

 

Thank you.

[timkoo]

Hello,
 
We hooked up the 6562 to another device and I was able to output signal through PFI 1, PFI 2 using markers in a script. I also was able to generate data to channels 0-15. And the result was great (gave a amplitude of 300 mv).
The only problem is that I was exporting on board clock signal to the DDC CLK OUT(LVDS) channel in the front panel DDC connector, the amplitude is only 50 mv). The code I ran was exactly like the one given in DynamicGenerationWithExportedClocks.c
 
ViReal64 sampleClockRate = 50.0e6;ViConstString sampleClockOutputTerminal = NIHSDIO_VAL_DDC_CLK_OUT_STR;
 
/* Configure clocking parameters */
niHSDIO_ConfigureSampleClock(vi, NIHSDIO_VAL_ON_BOARD_CLOCK_STR, sampleClockRate);
 
/* Configure clocks for export */
niHSDIO_ExportSignal(vi, NIHSDIO_VAL_SAMPLE_CLOCK, VI_NULL, sampleClockOutputTerminal);
 
/* Un-export clock */
niHSDIO_ExportSignal(vi, NIHSDIO_VAL_SAMPLE_CLOCK, VI_NULL, VI_NULL);
 
I am wondering if there is anyway to increase the amplitude of the DDC CLK OUT output? Thank you.