the response time of NI PXI-7813R?

[zxzhaohui]

Hi everyone.
the NI PXI-7813R is a digital I/O device with 160pins and 40MHz,programmable FPGA
I want to use it to control another device.
if I set all the 160pin signals(output)  to change from 0V to 3.3V,using LabVIEW(FPGA module included) programming.
how long will it takes to change the signal?
I mean all the 160 signals change from 0V to 3.3V.
will it get shorter if I use RealTime module in LabVIEW?I am not familiar with the digital I/O decices.
my question may sounds silly.
thanks!

[The Specialist]

Hi zxzhaohui, 1)  First, your question is not silly.  2)  Second, real-time does NOT mean faster.  So getting real-time will typically not mean you can change the digital channels faster.  3)  It says that it is LVTTL capable.  So I would find the timing spec for for LVTTL followed by the 40MHz single cycle timed loop.  That is probably the fastest speed you can go.

[zxzhaohui]

thanks for the reply.
then I was considering to generate a series of pulse signal(all the 160pin signals change together for 0V to 3.3V or 3.3V to 0V).
I'd like to know the rise time of the pulses ,the drop time should be the same as rise time ,right?

[DJ L.]

Hey zxzhaohui,
 
I just had some questions for you from a higher perspective, specifically what you are trying to do overall. First, can you provide the timing diagrams for the device you are trying to communicate with? Next, what kind of synchronization do you need across the digital lines? Have you already purchased the PXI-7831R or are you looking for what NI digital device will meet your requirements? What are all of your system requirments, other than 40 MHz and the 3.3 voltage level?
 
For your specific question, you can find the rise time and other specifications&nbsp;in the <a href="http://www.ni.com/pdf/manuals/371089d.pdf" target="_blank">NI 781xR User Manual</a>.
&nbsp;
The more information that you can provide about your system, the better the discussion forum community can help assist you find answers to your questions&nbsp;and&nbsp;find&nbsp;the best solution to fit your needs.
&nbsp;
Regards,
DJ L.

[zxzhaohui]

Actually I'm looking for a device,I think PCI7813 was suitable(maybe not).
&nbsp;
There are 3 AOMs(acousto-optic modulator) in our lab,
one AOM has a control driver named DDS(Direct Digital Synthesizers)
The DDS has a 48 pin&nbsp;input&nbsp;and a RF signal output.The output RF signal was connectted to the AOM.
31 pin of 48 represents a number between 0-2^31-1.
8 pin of 48 represents a number between 0-255.
and we need to controll the 31 pin's signal &nbsp;change&nbsp;for about 5000 times&nbsp;,each time by a step of 20000 or more.
This must be done&nbsp;less than 100microseconds.
and the 8 pin should generate a pulse signal&nbsp;such as&nbsp;0,100,0,100,0,255,0,190...
the duration time of pulse should be&nbsp;about 10--20 miliseconds.
the signal from 8pin or 31pin should change in parallel or change in a very short time(less than&nbsp;5% of 10 milisecond=0.5us)
I think the control&nbsp;program&nbsp;was not complicated,but the time request was critical.&nbsp;
&nbsp;
we have a PCI6509 to control the DDS&nbsp;now
which was controlled by &nbsp;PC LabVIEW program.
it's not a FPGA one,so we cannot generate the&nbsp;milisecond duration time,wo could only get 1microsecond at the best.
Another request was that I need to control 2 or 3 DDS together(2 at least),and it need 100pins or 150pins.
&nbsp;
so will the PCI7813 meet our request or there is a better one?
sorry for my&nbsp;poor in English.

[Jeff T.]

Hello zxzhaohui,Since the code executes on the FPGA itself, moving to another OS (RT for instance) will not affect the rise times.&nbsp; The specified minimum pulse width for the 7813R DO is 12.5ns so that device should be able to easily meet your needs of 10 ms for the 8 pin portion.&nbsp; Now for the the 31 pin signal, if you need to write 5000 words in 100us, then each word would have a duration of 20ns.&nbsp; This should also be fine but if you need to also create a clock that has a 20ns period (and a 10ns pulse width) then we are pushing beyond the specified limits of the device.Now to your original question: "What is the response time of the 7813R?"&nbsp; This depends on the FPGA speed at which you compile your logic.&nbsp; Once you write a value to the LabVIEW FPGA I/O Node, it will take two ticks of your FPGA clock for the data to pass through its synchronization registers.&nbsp; There will also be ~10 ns for the front end analog circuitry to respond.&nbsp; This of course may increase if you are driving higher capacitance.&nbsp;&nbsp; So in summary if you compile the FPGA code at 40MHz, then once you write a value to a LabVIEW FPGA I/O Node, it will take around 60ns for the data to appear on the line.Regards,Jeff TippsPSE - DSA, S Series, R Series, Sound and VibrationMessage Edited by Jeff T. on 05-13-2008 11:59 AM

[zxzhaohui]

Thanks for your answer
I write an VI&nbsp;on FPGA 7813.
&nbsp;

After compile,&nbsp;the&nbsp;result says:
Base Clock
Requested Rate:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 40.408938Mhz
Theoretical Maximum:&nbsp;&nbsp;&nbsp;&nbsp; 351.493849Mhz&nbsp;
Derived Clock:
Requested Rate:&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; 202.061122Mhz
Theoretical Maximum:&nbsp;&nbsp;&nbsp;&nbsp; 208.681135Mhz&nbsp;
&nbsp;
Does this means that if I download the program to the 7813,
it could take 1/351MHz (ie,2.8ns) or 1/208Mhz(ie.5ns)&nbsp;for one loop?
or will it&nbsp; be much slower than 351Mhz, even less than 200Mhz?
I need to know this , it's very important for me&nbsp;that it&nbsp;could help me to decide whether&nbsp;buy this 7813 or not.
here are the picture of the program and compile result:
&nbsp;


test_VI.jpg:
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compile_result.jpg:
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